1. Field of the Invention
The present invention relates in general to integrated circuit testers and in particular to a distributed, load-sharing power supply for an integrated circuit tester
2. Description of Related Art
As integrated circuit (IC) channel widths continue to decrease, so too have IC supply voltages. With the reduction in supply voltages, and with the increasing numbers of transistors being included in ICs, new generations of ICs demand increasingly larger amounts of current to satisfy their power needs. To test low-voltage, high current ICs, an IC tester must therefore be capable of supplying substantial amounts of current to IC devices under test (DUTs).
Patent Application No. 11/024,536 discloses an apparatus for testing an integrated circuit device under test (DUT) having a power input terminal for receiving current for powering the DUT, input terminals for receiving test signals, and output terminals for forwarding output signals that the DUT generates in response to the test signals, the apparatus comprising a plurality of tester channels for generating the test signals and for processing the DUT's output signals to determine how the DUT's output signals behave, a plurality of power modules, wherein each power module has a power output terminal and includes a power supply having a power supply output terminal connected to the power module's power output terminal, and the power supply is operative to develop a supply voltage at the power supply output terminal and to deliver an output current to the power supply output terminal, and a device interface structure for delivering the test signals from the tester channels to the DUT's input terminals, for delivering the DUT's output signals to the tester channels, and for delivering output current from the power output terminal of each power module to the DUT's power input terminal.
Since voltage differences between high and low logic levels in a low voltage IC are small, an IC tester's power supply system must also be capable of tightly regulating the voltage at DUT's power input terminals. In digital ICs employing synchronous logic, state changes in transistors are synchronized to edges of clock signals. A CMOS IC typically draws a large amount of current when transistors change state during a first part of each clock signal cycle and then draws relatively little current during the remaining portion of each clock signal cycle. The highly cyclic nature of a CMOS IC's current demand makes it difficult for a power supply to regulate the voltage at the IC's power input terminal, particularly for a high current IC where modest impedances between the power supply and the IC's power input terminal can produce a large periodic variation in supply voltage at the power input terminal. Such voltage variation can be reduced to acceptable limits by connecting a large regulating capacitor to the IC's power input terminal, but as IC current demand continues to increase, the amount of capacitance needed to provide adequate voltage regulation becomes impractically large.
What is needed is a power supply system for an integrated circuit tester capable of supplying large currents to power input terminals of one or more IC devices under test through very low impedance paths so that relatively small capacitance at the DUT power input terminals can adequately regulate supply voltages at those terminals despite wide variations in the IC's current demand.